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7.3 Feature Description 7.3.1 Overvoltage Protection The LM3481 has overvoltage protection (OVP) for the output voltage. OVP is sensed at the feedback pin (FB). If at anytime the voltage at the feedback pin rises to VFB + VOVP, OVP is triggered. See the Electrical Characteristics section for limits on VFB and VOVP. OVP will cause the drive pin (DR) to go low, forcing the power MOSFET off. With the MOSFET off, the output voltage will drop. The LM3481 will begin switching again when the feedback voltage reaches VFB + (VOVP - VOVP(HYS)). See the Electrical Characteristics section for limits on VOVP(HYS). The Error Amplifier is operationnal during OVP events. 7.3.2 Bias Voltage The internal bias of the LM3481 comes from either the internal bias voltage generator as shown in the block diagram or directly from the voltage at the VIN pin. At input voltages lower than 6 V the internal IC bias is the input voltage and at voltages above 6 V the internal bias voltage generator of the LM3481 provides the bias. The voltage for the gate driver is output on the VCC pin for compensation by an external capacitor (0.47μF to 4.7μF depending on the FET requirements). Biasing the VCC pin by an external voltage source should not be attempted. + _ PWM Comparator Control Signal -M2 DTS (1-D)TS M1 MC = 0 Steady State Signal Vsamp Perturbed Signal 'Vsamp1 'Vsamp0 <1 M2 M1 - 'Vsamp1 = - M2 M1 D 1-D 'Vsamp0 = - 'Vsamp0 13 LM3481, LM3481-Q1 www.ti.com SNVS346F –NOVEMBER 2007–REVISED NOVEMBER 2014 Product Folder Links: LM3481 LM3481-Q1 Copyright ? 2007–2014, Texas Instruments Incorporated Submit Documentation Feedback Feature Description (continued) 7.3.3 Slope Compensation Ramp The LM3481 uses a current mode control scheme. The main advantages of current mode control are inherent cycle-by-cycle current limit for the switch and simpler control loop characteristics. It is easy to parallel power stages using current mode control because current sharing is automatic. However there is a natural instability that will occur for duty cycles, D, greater than 50% if additional slope compensation is not addressed as described below. The current mode control scheme samples the inductor current, IL , and compares the sampled signal, Vsamp, to a internally generated control signal, Vc . The current sense resistor, RSEN, as shown in Figure 23, converts the sampled inductor current, IL , to the voltage signal, Vsamp, that is proportional to IL such that: Vsamp = IL x RSEN (1) The rising and falling slopes, M1 and ?M2 respectively, of Vsamp are also proportional to the inductor current rising and falling slopes, Mon and ?Moff respectively. Where Mon is the inductor slope during the switch on-time and ?Moff is the inductor slope during the switch off-time and are related to M1 and ?M2 by: M1 = Mon x RSEN (2) ?M2 = ?Moff x RSEN (3) For the boost topology: Mon = VIN / L (4) ?Moff = (VIN ? VOUT) / L (5) M1 = [VIN / L] x RSEN (6) ?M2 = [(VIN ? VOUT) / L] x RSEN (7) M2 = [(VOUT ? VIN) / L] x RSEN (8) Current mode control has an inherent instability for duty cycles greater than 50%, as shown in Figure 20, where the control signal slope, MC, equals zero. In Figure 20, a small increase in the load current causes the sampled signal to increase by ΔVsamp0. The effect of this load change, ΔVsamp1, at the end of the first switching cycle is : (9) From Equation 9, when D > 0.5, ΔVsamp1 will be greater than ΔVsamp0. In other words, the disturbance is divergent. So a very small perturbation in the load will cause the disturbance to increase. To ensure that the perturbed signal converges we must maintain: